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stm32 /stm32wl /STM32WL5x_CM4 /PWR /CR5

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Interpret as CR5

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RFEOLEN)RFEOLEN 0 (SMPSEN)SMPSEN

Description

Power control register 5

Fields

RFEOLEN

Enable Radio End Of Life detector enabled
SMPSEN

Enable SMPS Step Down converter SMPS mode enabled.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32