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stm32 /stm32wl /STM32WL5x_CM4 /PWR /PDCRA

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Interpret as PDCRA

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https://regviz.com/r/stm32/stm32wl/STM32WL5x_CM0P/PWR/PDCRA#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PD0)PD0 0 (PD1)PD1 0 (PD2)PD2 0 (PD3)PD3 0 (PD4)PD4 0 (PD5)PD5 0 (PD6)PD6 0 (PD7)PD7 0 (PD8)PD8 0 (PD9)PD9 0 (PD10)PD10 0 (PD11)PD11 0 (PD12)PD12 0 (PD13)PD13 0 (PD14)PD14 0 (PD15)PD15

Description

Power Port A pull-down control register

Fields

PD0

PD0
PD1

PD1
PD2

PD2
PD3

PD3
PD4

PD4
PD5

PD5
PD6

PD6
PD7

PD7
PD8

PD8
PD9

PD9
PD10

PD10
PD11

PD11
PD12

Port PA[y] pull-down (y=0 to 12)
PD13

PD13
PD14

ull-down
PD15

PD15

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32