PLL configuration register
| PLLSRC | Main PLL entry clock source |
| PLLM | Division factor for the main PLL input clock |
| PLLN | Main PLL multiplication factor for VCO |
| PLLPEN | Main PLL PLLPCLK output enable |
| PLLP | Main PLL division factor for PLLPCLK. |
| PLLQEN | Main PLL PLLQCLK output enable |
| PLLQ | Main PLL division factor for PLLQCLK |
| PLLREN | Main PLL PLLRCLK output enable |
| PLLR | Main PLL division factor for PLLRCLK |