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stm32 /stm32wl /STM32WL5x_CM4 /TIM16 /EGR

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Interpret as EGR

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https://regviz.com/r/stm32/stm32wl/STM32WL5x_CM0P/TIM17/EGR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (UG)UG 0 (CC1G)CC1G 0 (COMG)COMG 0 (BG)BG

Description

TIM16/TIM17 event generation register

Fields

UG

Update generation
CC1G

Capture/Compare 1 generation
COMG

Capture/Compare control update generation
BG

Break generation

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32