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stm32 /stm32wl /STM32WLE5_CM4 /ADC /AWD2TR

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Interpret as AWD2TR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0LT20HT2

Description

ADC watchdog threshold register

Fields

LT2

LT2
HT2

HT2

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32