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stm32 /stm32wl /STM32WLE5_CM4 /GPIOH /MODER

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Interpret as MODER

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0MODER3

Description

GPIO port mode register

Fields

MODER3

Port x configuration bits (y = 0…15)

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32