stm32 /stm32wl3 /STM32WL33 /TIM2 /RCR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as RCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0REP

Description

RCR register

Fields

REP

REP[7:0]: Repetition counter value

These bits allow the user to set-up the update rate of the compare registers (i.e. periodic

transfers from preload to active registers) when preload registers are enable, as well as the

update interrupt generation rate, if this interrupt is enable.

Each time the REP_CNT related downcounter reaches zero, an update event is generated

and it restarts counting from REP value. As REP_CNT is reloaded with REP value only at the

repetition update event U_RC, any write to the TIMx_RCR register is not taken in account until

the next repetition update event.

It means in PWM mode (REP+1) corresponds to the number of PWM periods in edge-aligned

mode.

Links

()