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ARM /CMSDK_CM3 /GPIO0 /INTPOLCLR

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Interpret as INTPOLCLR

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https://regviz.com/r/ARM/CMSDK_CM3/GPIO0/INTPOLCLR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

Description

Polarity-level, edge interrupt configuration clear Register

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data