Regviz

ARM /CMSDK_CM3 /SPI /SPCLK

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SPCLK

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/ARM/CMSDK_CM3/SPI/SPCLK#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

Description

SPI Clock Configuration

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data