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ARM /CMSDK_CM3 /WDT /WDOGCONTROL

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Interpret as WDOGCONTROL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Disable)INTEN 0 (Disable)RESEN

INTEN=Disable, RESEN=Disable

Description

Watchdog Control Register

Fields

INTEN

Enable the interrupt event

0 (Disable): Disable Watchdog interrupt

1 (Enable): ENable Watchdog interrupt.
RESEN

Enable watchdog reset output

0 (Disable): Disable Watchdog reset

1 (Enable): ENable Watchdog reset

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data