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ARM /CMSDK_CM3 /WDT /WDOGINTCLR

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Interpret as WDOGINTCLR

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https://regviz.com/r/ARM/CMSDK_CM3/WDT/WDOGINTCLR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (INT)INT

Description

Watchdog Interrupt Clear Register

Fields

INT

Interrupt

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data