PLL_VIDEO0_PAT0_CTRL

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as PLL_VIDEO0_PAT0_CTRL

FREQ=F_31_5_k, SPR_FREQ_MODE=DC0, SDM_CLK_SEL=F_24_M

PLL_VIDEO0 Pattern0 Control Register

WAVE_BOT	Wave Bottom
FREQ	Frequency 0 (F_31_5_k): undefined 1 (F_32_k): undefined 2 (F_32_5_k): undefined 3 (F_33_k): undefined
SDM_CLK_SEL	SDM Clock Select 0 (F_24_M): undefined 1 (F_12_M): undefined
WAVE_STEP	Wave Step
SPR_FREQ_MODE	Spread Frequency Mode 0 (DC0): undefined 1 (DC1): undefined 2 (Triangular_1): undefined 3 (Triangular_n): undefined
SIG_DELT_PAT_EN	Sigma-Delta Pattern Enable

()