CLK_SRC_SEL=HOSC
RISC-V Clock Register
DIV_CFG | Factor M |
AXI_DIV_CFG | Factor N |
CLK_SRC_SEL | Clock Source Select 0 (HOSC): undefined 1 (CLK32K): undefined 2 (CLK16M_RC): undefined 3 (PLL_PERI_800M): undefined 4 (PLL_PERI_1X): undefined 5 (PLL_CPU): undefined 6 (PLL_AUDIO1_DIV2): undefined |