Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/Allwinner/D1H/CCU/TPADC_CLK#0x0
CLK_GATING=Off, CLK_SRC_SEL=HOSC
TPADC Clock Register
Clock Source Select
0 (HOSC): undefined
1 (PLL_AUDIO0_1X): undefined
Gating Clock
0 (Off): undefined
1 (On): undefined
https://github.com/cmsis-svd/cmsis-svd-data