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Allwinner /D1H /EMAC /EMAC_BASIC_CTL0

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Interpret as EMAC_BASIC_CTL0

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Half_Duplex)DUPLEX 0 (Disable)LOOPBACK 0 (S1000)SPEED

LOOPBACK=Disable, DUPLEX=Half_Duplex, SPEED=S1000

Description

EMAC Basic Control Register0

Fields

DUPLEX

EMAC Transfer Mode

0 (Half_Duplex): undefined

1 (Full_Duplex): undefined
LOOPBACK

EMAC Loopback Mode For Test

0 (Disable): undefined

1 (Enable): undefined
SPEED

EMAC Working Speed

0 (S1000): undefined

1 (Reserved): undefined

2 (S10): undefined

3 (S100): undefined

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data