MDC_DIV_RATIO_M=R16, MII_WR=R
EMAC Management Interface Command Register
MII_BUSY | MII Status |
MII_WR | MII Write and Read 0 ®: undefined 1 (W): undefined |
PHY_REG_ADDR | PHY Register Address |
PHY_ADDR | PHY Address |
MDC_DIV_RATIO_M | MDC Clock DIvider Ratio 0 (R16): undefined 1 (R32): undefined 2 (R64): undefined 3 (R128): undefined |