EMAC_TX_CTL1

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Interpret as EMAC_TX_CTL1

TX_DMA_START=no_valid, TX_TH=T64, TX_DMA_EN=stop, TX_MD=greater_than_th, FLUSH_TX_FIFO=enable

EMAC Transmit Control Register1

FLUSH_TX_FIFO	Flush the data in the TX FIFO 0 (enable): undefined 1 (disable): undefined
TX_MD	Transmission Mode 0 (greater_than_th): undefined 1 (locate_full_frame): undefined
TX_TH	Threshold value of TX DMA FIFO 0 (T64): undefined 1 (T128): undefined 2 (T192): undefined 3 (T256): undefined
TX_DMA_EN	Transmit DMA Enable 0 (stop): undefined 1 (start): undefined
TX_DMA_START	Transmit DMA FSM Start 0 (no_valid): undefined 1 (start): undefined

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