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Allwinner /D1H /LEDC /LEDC_INT_CTRL

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Interpret as LEDC_INT_CTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Disable)LED_TRANS_FINISH_INT_EN 0 (Disable)FIFO_CPUREQ_INT_EN 0 (Disable)WAITDATA_TIMEOUT_INT_EN 0 (Disable)FIFO_OVERFLOW_INT_EN 0 (Disable)GLOBAL_INT_EN

LED_TRANS_FINISH_INT_EN=Disable, GLOBAL_INT_EN=Disable, FIFO_CPUREQ_INT_EN=Disable, FIFO_OVERFLOW_INT_EN=Disable, WAITDATA_TIMEOUT_INT_EN=Disable

Description

LEDC Interrupt Control Register

Fields

LED_TRANS_FINISH_INT_EN

0 (Disable): undefined

1 (Enable): undefined
FIFO_CPUREQ_INT_EN

0 (Disable): undefined

1 (Enable): undefined
WAITDATA_TIMEOUT_INT_EN

0 (Disable): undefined

1 (Enable): undefined
FIFO_OVERFLOW_INT_EN

0 (Disable): undefined

1 (Enable): undefined
GLOBAL_INT_EN

0 (Disable): undefined

1 (Enable): undefined

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data