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Allwinner /D1H /RISCV_CFG /TS_TMODE_SEL_REG

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as TS_TMODE_SEL_REG

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Normal)TS_TEST_MODE_EN

TS_TEST_MODE_EN=Normal

Description

Timestamp Test Mode Select Register

Fields

TS_TEST_MODE_EN

Timestamp Test Mode Enable

0 (Normal): undefined

1 (Test): undefined

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data