cmdt=write, dat_seq=msb, dat_fmt=RGB111, dbi_interface=L3I1, rgb_src_fmt=RGB, element_a_pos=31_24, tran_mod=command_parameter, vi_src_type=rgb32, rgb_seq=RGB, rgb_bo=data
DBI Control Register 0
| vi_src_type | Video Source Type 0 (rgb32): undefined 1 (rgb16): undefined |
| element_a_pos | Element A Position 0 (31_24): undefined 1 (7_0): undefined |
| rgb_bo | RGB Bit Order 0 (data): undefined 1 (swap): undefined |
| dum_val | Dummy Cycle Value |
| rgb_src_fmt | RGB Source Format 0 (RGB): undefined 1 (RBG): undefined 2 (GRB): undefined 3 (GBR): undefined 4 (BRG): undefined 5 (BGR): undefined 6 (GRBG_0): undefined 7 (GBRG_0): undefined 8 (GRBG_1): undefined 9 (GBRG_1): undefined |
| dbi_interface | 0 (L3I1): 3 Line Interface I 1 (L3I2): 3 Line Interface II 2 (L4I1): 4 Line Interface I 3 (L4I2): 4 Line Interface II 4 (D2LI): 2 Data Lane Interface |
| dat_fmt | Output Data Format 0 (RGB111): undefined 1 (RGB444): undefined 2 (RGB565): undefined 3 (RGB666): undefined 4 (RGB888): undefined |
| tran_mod | Transmit Mode 0 (command_parameter): undefined 1 (video): undefined |
| rgb_seq | Output RGB Sequence 0 (RGB): undefined 1 (RBG): undefined 2 (GRB): undefined 3 (GBR): undefined 4 (BRG): undefined 5 (BGR): undefined |
| dat_seq | Output Data Sequence 0 (msb): undefined 1 (lsb): undefined |
| wcdc | Write Command Dummy Cycles |
| cmdt | Command Type 0 (write): undefined 1 (read): undefined |