Regviz

Atmel /AT91SAM9CN12 /LCDC /BASECFG1

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as BASECFG1

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Atmel/AT91SAM9CN12/LCDC/BASECFG1#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CLUTEN)CLUTEN 0 (12BPP_RGB_444)RGBMODE0 (1BPP)CLUTMODE

RGBMODE=12BPP_RGB_444, CLUTMODE=1BPP

Description

Base Layer Configuration Register 1

Fields

CLUTEN

Color Lookup Table Enable
RGBMODE

RGB Input Mode Selection

0 (12BPP_RGB_444): 12 bpp RGB 444

1 (16BPP_ARGB_4444): 16 bpp ARGB 4444

2 (16BPP_RGBA_4444): 16 bpp RGBA 4444

3 (16BPP_RGB_565): 16 bpp RGB 565

4 (16BPP_TRGB_1555): 16 bpp TRGB 1555

5 (18BPP_RGB_666): 18 bpp RGB 666

6 (18BPP_RGB_666_PACKED): 18 bpp RGB 666 PACKED

7 (19BPP_TRGB_1666): 19 bpp TRGB 1666

8 (19BPP_TRGB_PACKED): 19 bpp TRGB 1666 PACKED

9 (24BPP_RGB_888): 24 bpp RGB 888

10 (24BPP_RGB_888_PACKED): 24 bpp RGB 888 PACKED

11 (25BPP_TRGB_1888): 25 bpp TRGB 1888

12 (32BPP_ARGB_8888): 32 bpp ARGB 8888

13 (32BPP_RGBA_8888): 32 bpp RGBA 8888
CLUTMODE

Color Lookup Table Input Mode Selection

0 (1BPP): color lookup table mode set to 1 bit per pixel

1 (2BPP): color lookup table mode set to 2 bits per pixel

2 (4BPP): color lookup table mode set to 4 bits per pixel

3 (8BPP): color lookup table mode set to 8 bits per pixel

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data