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Atmel /AT91SAM9G10 /PMC /CKGR_PLLAR

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Interpret as CKGR_PLLAR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DIVA0PLLACOUNT0OUTA 0MULA0 (STUCKTO1)STUCKTO1

Description

PLL A Register

Fields

DIVA

Divider A
PLLACOUNT

PLL A Counter
OUTA

PLL A Clock Frequency Range
MULA

PLL A Multiplier
STUCKTO1

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data