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Atmel /AT91SAM9G20 /ADC /CHDR

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Interpret as CHDR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CH0)CH0 0 (CH1)CH1 0 (CH2)CH2 0 (CH3)CH3

Description

Channel Disable Register

Fields

CH0

Channel 0 Disable
CH1

Channel 1 Disable
CH2

Channel 2 Disable
CH3

Channel 3 Disable

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data