Atmel /AT91SAM9G20 /ISI /CR1

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Interpret as CR1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ISI_RST)ISI_RST 0 (ISI_DIS)ISI_DIS 0 (HSYNC_POL)HSYNC_POL 0 (VSYNC_POL)VSYNC_POL 0 (PIXCLK_POL)PIXCLK_POL 0 (EMB_SYNC)EMB_SYNC 0 (CRC_SYNC)CRC_SYNC 0FRATE0 (FULL)FULL 0THMASK 0 (CODEC_ON)CODEC_ON 0SLD0SFD

Description

ISI Control 1 Register

Fields

ISI_RST

Image sensor interface reset

ISI_DIS

Image sensor disable:

HSYNC_POL

Horizontal synchronization polarity

VSYNC_POL

Vertical synchronization polarity

PIXCLK_POL

Pixel clock polarity

EMB_SYNC

Embedded synchronization

CRC_SYNC

Embedded synchronization

FRATE

Frame rate [0…7]

FULL

Full mode is allowed

THMASK

Threshold mask

CODEC_ON

Enable the codec path enable bit

SLD

Start of Line Delay

SFD

Start of Frame Delay

Links

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