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Atmel /AT91SAM9G20 /PMC /PMC_SCDR

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Interpret as PMC_SCDR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PCK)PCK 0 (UHP)UHP 0 (UDP)UDP 0 (PCK0)PCK0 0 (PCK1)PCK1

Description

System Clock Disable Register

Fields

PCK

Processor Clock Disable
UHP

USB Host Port Clock Disable
UDP

USB Device Port Clock Disable
PCK0

Programmable Clock 0 Output Disable
PCK1

Programmable Clock 1 Output Disable

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data