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Atmel /AT91SAM9M11 /PMC /PMC_MCKR

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Interpret as PMC_MCKR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CSS0PRES0MDIV 0 (PLLADIV2)PLLADIV2

Description

Master Clock Register

Fields

CSS

Master/Processor Clock Source Selection
PRES

Master/Processor Clock Prescaler
MDIV

Master Clock Division
PLLADIV2

PLLA divisor by 2

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data