Atmel /AT91SAM9M11 /VDEC /DDCR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as DDCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0MAX_BURST_LEN 0PRIOR0 (DO_LE)DO_LE 0 (INTCE_LE)INTCE_LE 0 (DDCGE)DDCGE 0LAT_COMP0 (DOPF)DOPF 0 (AHB_BURST)AHB_BURST 0 (DI_LE)DI_LE 0 (HTI)HTI

Description

Decoder Device Configuration Register

Fields

MAX_BURST_LEN

Maximum Burst Length for Decoder Bus Transactions

PRIOR

Decoder Core Internal Bus Service Priority

DO_LE

Decoder Output Endian Mode

INTCE_LE

Interface Endian Mode

DDCGE

Decoder Dynamic Clock Gating Enable

LAT_COMP

Decoder Latency Compensation

DOPF

Decoder Output Picture Format

AHB_BURST

AHB Precise Burst and Data Discard Enable

DI_LE

Decoder Input Endian Mode

HTI

Hardware Timeout Interrupt Enable

Links

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