BLEN=AHB_SINGLE
Overlay 1 Configuration 0 Register
| BLEN | AHB Burst Length 0 (AHB_SINGLE): AHB Access is started as soon as there is enough space in the FIFO to store one 32-bit data. SINGLE, INCR, INCR4, INCR8 and INCR16 bursts are preferred. INCR is used for a burst of 2 and 3 beats. 1 (AHB_INCR4): AHB Access is started as soon as there is enough space in the FIFO to store a total amount of four 32-bit data. An AHB INCR4 Burst is preferred. SINGLE, INCR and INCR4 bursts can be used. INCR is used for a burst of 2 and 3 beats. 2 (AHB_INCR8): AHB Access is started as soon as there is enough space in the FIFO to store a total amount of eight 32-bit data. An AHB INCR8 Burst is preferred. SINGLE, INCR, INCR4 and INCR8 bursts can be used. INCR is used for a burst of 2 and 3 beats. 3 (AHB_INCR16): AHB Access is started as soon as there is enough space in the FIFO to store a total amount of sixteen 32-bit data. An AHB INCR16 Burst is preferred. SINGLE, INCR, INCR4, INCR8 and INCR16 bursts can be used. INCR is used for a burst of 2 and 3 beats. |
| DLBO | Defined Length Burst Only for Channel Bus Transaction. |
| ROTDIS | Hardware Rotation Optimization Disable |
| LOCKDIS | Hardware Rotation Lock Disable |