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Atmel /ATSAM3N00A /ADC /ISR

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Interpret as ISR

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https://regviz.com/r/Atmel/ATSAM3S1C/ADC/ISR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (EOC0)EOC0 0 (EOC1)EOC1 0 (EOC2)EOC2 0 (EOC3)EOC3 0 (EOC4)EOC4 0 (EOC5)EOC5 0 (EOC6)EOC6 0 (EOC7)EOC7 0 (EOC8)EOC8 0 (EOC9)EOC9 0 (EOC10)EOC10 0 (EOC11)EOC11 0 (EOC12)EOC12 0 (EOC13)EOC13 0 (EOC14)EOC14 0 (EOC15)EOC15 0 (DRDY)DRDY 0 (GOVRE)GOVRE 0 (COMPE)COMPE 0 (ENDRX)ENDRX 0 (RXBUFF)RXBUFF

Description

Interrupt Status Register

Fields

EOC0

End of Conversion 0
EOC1

End of Conversion 1
EOC2

End of Conversion 2
EOC3

End of Conversion 3
EOC4

End of Conversion 4
EOC5

End of Conversion 5
EOC6

End of Conversion 6
EOC7

End of Conversion 7
EOC8

End of Conversion 8
EOC9

End of Conversion 9
EOC10

End of Conversion 10
EOC11

End of Conversion 11
EOC12

End of Conversion 12
EOC13

End of Conversion 13
EOC14

End of Conversion 14
EOC15

End of Conversion 15
DRDY

Data Ready
GOVRE

General Overrun Error
COMPE

Comparison Error
ENDRX

End of RX Buffer
RXBUFF

RX Buffer Full

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data