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Atmel /ATSAM3U2E /ADC12B /ACR

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Interpret as ACR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0GAIN 0IBCTL 0 (DIFF)DIFF 0 (OFFSET)OFFSET

Description

Analog Control Register

Fields

GAIN

Input Gain
IBCTL

Bias Current Control
DIFF

Differential Mode
OFFSET

Input OFFSET

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data