Atmel /ATSAM3X8E /HSMCI /SR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CMDRDY)CMDRDY 0 (RXRDY)RXRDY 0 (TXRDY)TXRDY 0 (BLKE)BLKE 0 (DTIP)DTIP 0 (NOTBUSY)NOTBUSY 0 (SDIOIRQforSlotA)SDIOIRQforSlotA 0 (SDIOIRQforSlotB)SDIOIRQforSlotB 0 (SDIOWAIT)SDIOWAIT 0 (CSRCV)CSRCV 0 (RINDE)RINDE 0 (RDIRE)RDIRE 0 (RCRCE)RCRCE 0 (RENDE)RENDE 0 (RTOE)RTOE 0 (DCRCE)DCRCE 0 (DTOE)DTOE 0 (CSTOE)CSTOE 0 (BLKOVRE)BLKOVRE 0 (DMADONE)DMADONE 0 (FIFOEMPTY)FIFOEMPTY 0 (XFRDONE)XFRDONE 0 (ACKRCV)ACKRCV 0 (ACKRCVE)ACKRCVE 0 (OVRE)OVRE 0 (UNRE)UNRE

Description

Status Register

Fields

CMDRDY

Command Ready

RXRDY

Receiver Ready

TXRDY

Transmit Ready

BLKE

Data Block Ended

DTIP

Data Transfer in Progress

NOTBUSY

HSMCI Not Busy

SDIOIRQforSlotA
SDIOIRQforSlotB
SDIOWAIT

SDIO Read Wait Operation Status

CSRCV

CE-ATA Completion Signal Received

RINDE

Response Index Error

RDIRE

Response Direction Error

RCRCE

Response CRC Error

RENDE

Response End Bit Error

RTOE

Response Time-out Error

DCRCE

Data CRC Error

DTOE

Data Time-out Error

CSTOE

Completion Signal Time-out Error

BLKOVRE

DMA Block Overrun Error

DMADONE

DMA Transfer done

FIFOEMPTY

FIFO empty flag

XFRDONE

Transfer Done flag

ACKRCV

Boot Operation Acknowledge Received

ACKRCVE

Boot Operation Acknowledge Error

OVRE

Overrun

UNRE

Underrun

Links

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