Atmel /ATSAM4SP32A /CMCC /TYPE

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as TYPE

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (AP)AP 0 (GCLK)GCLK 0 (RANDP)RANDP 0 (LRUP)LRUP 0 (RRP)RRP 0 (DMAPPED)WAYNUM 0 (LCKDOWN)LCKDOWN 0 (CSIZE_1KB)CSIZE0 (CLSIZE_1KB)CLSIZE

WAYNUM=DMAPPED, CSIZE=CSIZE_1KB, CLSIZE=CLSIZE_1KB

Description

Cache Type Register

Fields

AP

Access Port Access Allowed

GCLK

Dynamic Clock Gating Supported

RANDP

Random Selection Policy Supported

LRUP

Least Recently Used Policy Supported

RRP

Random Selection Policy Supported

WAYNUM

Number of Way

0 (DMAPPED): Direct Mapped Cache

1 (ARCH2WAY): 2-WAY set associative

2 (ARCH4WAY): 4-WAY set associative

3 (ARCH8WAY): 8-WAY set associative

LCKDOWN

Lock Down Supported

CSIZE

Cache Size

0 (CSIZE_1KB): Cache Size 1 Kbytes

1 (CSIZE_2KB): Cache Size 2 Kbytes

2 (CSIZE_4KB): Cache Size 4 Kbytes

3 (CSIZE_8KB): Cache Size 8 Kbytes

CLSIZE

Cache Size

0 (CLSIZE_1KB): 4 bytes

1 (CLSIZE_2KB): 8 bytes

2 (CLSIZE_4KB): 16 bytes

3 (CLSIZE_8KB): 32 bytes

Links

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