OCU ch.0/1 Control Register A
| CST0 | Enables the operation of OCU ch.(0) |
| CST1 | Enables the operation of OCU ch.(1) |
| IOE0 | Generates interrupt@ when “1” is set to OCSA.IOP0 |
| IOE1 | Generates interrupt@ when “1” is set to OCSA.IOP1 |
| IOP0 | Indicates that a match has already been detected between FRT’s count value and OCCP(0) value at OCU ch.(0). |
| IOP1 | Indicates that a match has already been detected between FRT’s count value and OCCP(1) value at OCU ch.(1). |