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Fujitsu /S6E2CC /CRG /INT_ENR

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Interpret as INT_ENR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (MCSE)MCSE 0 (SCSE)SCSE 0 (PCSE)PCSE 0 (FCSE)FCSE

Description

Interrupt Enable Register

Fields

MCSE

Main oscillation stabilization completion interrupt enable bit
SCSE

Sub oscillation stabilization completion interrupt enable bit
PCSE

PLL oscillation stabilization completion interrupt enable bit
FCSE

Anomalous frequency detection interrupt enable bit

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data