Fujitsu /S6E2CC /CRG /SCM_CTL

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SCM_CTL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (MOSCE)MOSCE 0 (SOSCE)SOSCE 0 (PLLE)PLLE 0RCS

Description

System Clock Mode Control Register

Fields

MOSCE

Main clock oscillation enable bit

SOSCE

Sub clock oscillation enable bit

PLLE

PLL oscillation enable bit

RCS

Master clock switch control bits

Links

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