Fujitsu /S6E2CC /HSSPI /TXE

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as TXE

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TFFE)TFFE 0 (TFEE)TFEE 0 (TFOE)TFOE 0 (TFUE)TFUE 0 (TFLETE)TFLETE 0 (TFMTE)TFMTE 0 (TSSRE)TSSRE

Description

Transmission Interrupt Enable Register

Fields

TFFE

TX-FIFO full detection interrupt enable bit

TFEE

TX-FIFO and shift register empty detection interrupt enable bit

TFOE

TX-FIFO overrun detection interrupt enable bit

TFUE

TX-FIFO underrun detection interrupt enable bit

TFLETE

TX-FIFO-less-than-or-equal-to-threshold detection interrupt enable bit

TFMTE

TX-FIFO-exceeded-threshold detection interrupt enable bit

TSSRE

Slave select released detection interrupt enable bit

Links

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