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Fujitsu /S6E2CC /I2S0 /MCR0REG

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Interpret as MCR0REG

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https://regviz.com/r/Fujitsu/S6E2CC/I2S0/MCR0REG#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0S0WDL0S0CHL0S0CHN0S1WDL0S1CHL0S1CHN

Description

Channel Control Register 0

Fields

S0WDL

This sets the word length of the channels that make up subframe 1
S0CHL

This sets the channel length of the channels that make up subframe 1
S0CHN

This sets the number of channels for subframe 0
S1WDL

This sets the word length of the channels that make up subframe 1
S1CHL

This sets the channel length of the channels that make up subframe 1
S1CHN

This sets the number of channels for subframe 1

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data