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Fujitsu /S6E2CC /I2S0 /MCR1REG

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Interpret as MCR1REG

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (S0CH00)S0CH00 0 (S0CH01)S0CH01 0 (S0CH02)S0CH02 0 (S0CH03)S0CH03 0 (S0CH04)S0CH04 0 (S0CH05)S0CH05 0 (S0CH06)S0CH06 0 (S0CH07)S0CH07 0 (S0CH08)S0CH08 0 (S0CH09)S0CH09 0 (S0CH10)S0CH10 0 (S0CH11)S0CH11 0 (S0CH12)S0CH12 0 (S0CH13)S0CH13 0 (S0CH14)S0CH14 0 (S0CH15)S0CH15 0 (S0CH16)S0CH16 0 (S0CH17)S0CH17 0 (S0CH18)S0CH18 0 (S0CH19)S0CH19 0 (S0CH20)S0CH20 0 (S0CH21)S0CH21 0 (S0CH22)S0CH22 0 (S0CH23)S0CH23 0 (S0CH24)S0CH24 0 (S0CH25)S0CH25 0 (S0CH26)S0CH26 0 (S0CH27)S0CH27 0 (S0CH28)S0CH28 0 (S0CH29)S0CH29 0 (S0CH30)S0CH30 0 (S0CH31)S0CH31

Description

Channel Control Register 1

Fields

S0CH00

This controls the enable/disable state of the channel 0 in subframe 0
S0CH01

This controls the enable/disable state of the channel 1 in subframe 0
S0CH02

This controls the enable/disable state of the channel 2 in subframe 0
S0CH03

This controls the enable/disable state of the channel 3 in subframe 0
S0CH04

This controls the enable/disable state of the channel 4 in subframe 0
S0CH05

This controls the enable/disable state of the channel 5 in subframe 0
S0CH06

This controls the enable/disable state of the channel 6 in subframe 0
S0CH07

This controls the enable/disable state of the channel 7 in subframe 0
S0CH08

This controls the enable/disable state of the channel 8 in subframe 0
S0CH09

This controls the enable/disable state of the channel 9 in subframe 0
S0CH10

This controls the enable/disable state of the channel 10 in subframe 0
S0CH11

This controls the enable/disable state of the channel 11 in subframe 0
S0CH12

This controls the enable/disable state of the channel 12 in subframe 0
S0CH13

This controls the enable/disable state of the channel 13 in subframe 0
S0CH14

This controls the enable/disable state of the channel 14 in subframe 0
S0CH15

This controls the enable/disable state of the channel 15 in subframe 0
S0CH16

This controls the enable/disable state of the channel 16 in subframe 0
S0CH17

This controls the enable/disable state of the channel 17 in subframe 0
S0CH18

This controls the enable/disable state of the channel 18 in subframe 0
S0CH19

This controls the enable/disable state of the channel 19 in subframe 0
S0CH20

This controls the enable/disable state of the channel 20 in subframe 0
S0CH21

This controls the enable/disable state of the channel 21 in subframe 0
S0CH22

This controls the enable/disable state of the channel 22 in subframe 0
S0CH23

This controls the enable/disable state of the channel 23 in subframe 0
S0CH24

This controls the enable/disable state of the channel 24 in subframe 0
S0CH25

This controls the enable/disable state of the channel 25 in subframe 0
S0CH26

This controls the enable/disable state of the channel 26 in subframe 0
S0CH27

This controls the enable/disable state of the channel 27 in subframe 0
S0CH28

This controls the enable/disable state of the channel 28 in subframe 0
S0CH29

This controls the enable/disable state of the channel 29 in subframe 0
S0CH30

This controls the enable/disable state of the channel 30 in subframe 0
S0CH31

This controls the enable/disable state of the channel 31 in subframe 0

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data