Regviz

Infineon /IMC300A /ADC /RESD

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as RESD

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Infineon/IMC300A/ADC/RESD#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RESULT0CHNR0 (value1)FCR 0 (value1)VF

VF=value1, FCR=value1

Description

Result Register, Debug

Fields

RESULT

Result of most recent conversion
CHNR

Channel Number
FCR

Fast Compare Result

0 (value1): Signal level was below compare value (debug)

1 (value2): Signal level was above compare value (debug)
VF

Valid Flag

0 (value1): Read access: No new valid data available - Write access: No effect (debug)

1 (value2): Read access: Bitfield RESULT contains valid data - Write access: Clear this valid flag (debug)

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data