Infineon /IMC300A /ADC /RSMR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as RSMR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (value1)ENGT 0 (value1)ENTR 0 (value1)ENSI 0 (value1)SCAN 0 (value1)LDM 0 (value1)REQGT 0 (value1)CLRPND 0 (value1)LDEV

ENGT=value1, REQGT=value1, ENTR=value1, SCAN=value1, LDEV=value1, LDM=value1, CLRPND=value1, ENSI=value1

Description

Request Source Mode Register

Fields

ENGT

Enable Gate

0 (value1): No conversion requests are issued

1 (value2): Conversion requests issued by pending bits

2 (value3): Conversion requests issued by pending bits and REQGTx is 1

3 (value4): Conversion requests issued by pending bits and REQGTx is 0

ENTR

Enable External Trigger

0 (value1): External trigger disabled

1 (value2): External trigger enabled

ENSI

Enable Source Interrupt

0 (value1): No request source interrupt

1 (value2): A request source interrupt is generated after last pending conversion is finished

SCAN

Autoscan Enable

0 (value1): No autoscan

1 (value2): Autoscan functionality enabled

LDM

Autoscan Source Load Event Mode

0 (value1): A load event copies all bits from the select register to the pending register

1 (value2): A load event OR combines pending bits with select register bits

REQGT

Request Gate Level

0 (value1): The gate input is low

1 (value2): The gate input is high

CLRPND

Clear Pending Bits

0 (value1): No action

1 (value2): The bits in registers BRSPNDx are cleared

LDEV

Generate Load Event

0 (value1): No action

1 (value2): A load event is generated

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