VADC=value1, MCE=value1, POSIF0=value1, WDT=value1, MCAN0=value1, CCU41=value1, POSIF1=value1, USIC1=value1, CCU81=value1, RTC=value1, DAC0=value1, USIC0=value1, CCU40=value1, CCU80=value1
Peripheral 0 Clock Gating Set
| VADC | VADC and SHS Gating Set 0 (value1): no effect 1 (value2): enable gating |
| CCU80 | CCU80 Gating Set 0 (value1): no effect 1 (value2): enable gating |
| CCU40 | CCU40 Gating Set 0 (value1): no effect 1 (value2): enable gating |
| USIC0 | USIC0 Gating Set 0 (value1): no effect 1 (value2): enable gating |
| DAC0 | DAC0 Gating Set 0 (value1): no effect 1 (value2): enable gating |
| POSIF0 | POSIF0 Gating Set 0 (value1): no effect 1 (value2): enable gating |
| MCE | MCE Gating Set 0 (value1): no effect 1 (value2): enable gating |
| WDT | WDT Gating Set 0 (value1): no effect 1 (value2): enable gating |
| RTC | RTC Gating Set 0 (value1): no effect 1 (value2): enable gating |
| CCU81 | CCU81 Gating Set 0 (value1): no effect 1 (value2): enable gating |
| CCU41 | CCU41 Gating Set 0 (value1): no effect 1 (value2): enable gating |
| USIC1 | USIC1 Gating Set 0 (value1): no effect 1 (value2): enable gating |
| POSIF1 | POSIF1 Gating Set 0 (value1): no effect 1 (value2): enable gating |
| MCAN0 | MutliCAN Gating Set 0 (value1): no effect 1 (value2): enable gating |