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Infineon /XMC1400 /PORT1 /OMR

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Interpret as OMR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PS0)PS0 0 (PS1)PS1 0 (PS2)PS2 0 (PS3)PS3 0 (PS4)PS4 0 (PS5)PS5 0 (PS6)PS6 0 (PS7)PS7 0 (PS8)PS8 0 (PR0)PR0 0 (PR1)PR1 0 (PR2)PR2 0 (PR3)PR3 0 (PR4)PR4 0 (PR5)PR5 0 (PR6)PR6 0 (PR7)PR7 0 (PR8)PR8

Description

Port 1 Output Modification Register

Fields

PS0

Port 1 Set Bit 0
PS1

Port 1 Set Bit 1
PS2

Port 1 Set Bit 2
PS3

Port 1 Set Bit 3
PS4

Port 1 Set Bit 4
PS5

Port 1 Set Bit 5
PS6

Port 1 Set Bit 6
PS7

Port 1 Set Bit 7
PS8

Port 1 Set Bit 8
PR0

Port 1 Reset Bit 0
PR1

Port 1 Reset Bit 1
PR2

Port 1 Reset Bit 2
PR3

Port 1 Reset Bit 3
PR4

Port 1 Reset Bit 4
PR5

Port 1 Reset Bit 5
PR6

Port 1 Reset Bit 6
PR7

Port 1 Reset Bit 7
PR8

Port 1 Reset Bit 8

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data