MPERSTEN=value1, MRSTEN=value1, LOCRSTEN=value1, LOECRSTEN=value1, ECCRSTEN=value1, U0PERSTEN=value1, U1PERSTEN=value1, SPERSTEN=value1
RCU Reset Control Register
| ECCRSTEN | Enable ECC Error Reset 0 (value1): No reset when ECC double bit error occur 1 (value2): Reset when ECC double bit error occur |
| LOCRSTEN | Enable Loss of DCO1 Clock Reset 0 (value1): No reset when loss of DCO1 clock occur 1 (value2): Reset when loss of DCO1 clock occur |
| SPERSTEN | Enable 16kbytes SRAM Parity Error Reset 0 (value1): No reset when SRAM parity error occur 1 (value2): Reset when SRAM parity error occur |
| U0PERSTEN | Enable USIC0 SRAM Parity Error Reset 0 (value1): No reset when USIC0 memory parity error occur 1 (value2): Reset when USIC0 memory parity error occur |
| U1PERSTEN | Enable USIC01 SRAM Parity Error Reset 0 (value1): No reset when USIC1 memory parity error occur 1 (value2): Reset when USIC1 memory parity error occur |
| MPERSTEN | Enable MultiCAN+SRAM Parity Error Reset 0 (value1): No reset when MultiCAN+ memory parity error occur 1 (value2): Reset when MultiCAN+ memory parity error occur |
| LOECRSTEN | Enable Loss of External Clock Reset 0 (value1): No reset when loss of external clock occur 1 (value2): Reset when loss of external clock occur |
| MRSTEN | Enable Master Reset 0 (value1): No effect 1 (value2): Triggered Master reset |