C1SS=value1, C1ES=value1, S1M=value1, C1CS=value1, C0ES=value1, S0ES=value1, C1M=value1, S0M=value1, C0M=value1, C0CS=value1, S1ES=value1, C0SS=value1
HRC global control selection
| C0SS | Source selector 0 comparator set configuration 0 (value1): CMP output of CSG0 unit can be used as set source for the output latch 1 (value2): CMP output of CSG1 unit can be used as set source for the output latch 2 (value3): CMP output of CSG2 unit can be used as set source for the output latch |
| C0CS | Source selector 0 comparator clear configuration 0 (value1): CMP output of CSG0 unit can be used as clear source for the output latch 1 (value2): CMP output of CSG1 unit can be used as clear source for the output latch 2 (value3): CMP output of CSG2 unit can be used as clear source for the output latch |
| S0M | Source selector 0 set configuration 0 (value1): Set from source selector 0 is controlled via the Capture/Compare Unit timer, CCSTy signal 1 (value2): Set from source selector 0 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C0SS field. |
| C0M | Source selector 0 clear configuration 0 (value1): Clear from source selector 0 is controlled via the Capture/Compare Unit timer, CCSTy signal 1 (value2): Clear from source selector 0 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C0CS field. |
| S0ES | Source selector 0 set edge configuration 0 (value1): Generation of the set signal is disabled 1 (value2): Set signal is generated on a LOW to HIGH transition of the selected input 2 (value3): Set signal is generated on a HIGH to LOW transition of the selected input 3 (value4): Set signal is generated on both transitions of the selected input |
| C0ES | Source selector 0 clear edge configuration 0 (value1): Generation of the clear signal is disabled 1 (value2): Clear signal is generated on a LOW to HIGH transition of the selected input 2 (value3): Clear signal is generated on a HIGH to LOW transition of the selected input 3 (value4): Clear signal is generated on both transitions of the selected input |
| C1SS | Source selector 1 comparator set configuration 0 (value1): CMP output of CSG0 unit can be used as set source for the output latch 1 (value2): CMP output of CSG2 unit can be used as set source for the output latch 2 (value3): CMP output of CSG2 unit can be used as set source for the output latch |
| C1CS | Source selector 1 comparator clear configuration 0 (value1): CMP output of CSG0 unit can be used as clear source for the output latch 1 (value2): CMP output of CSG2 unit can be used as clear source for the output latch 2 (value3): CMP output of CSG2 unit can be used as clear source for the output latch |
| S1M | Source selector 1 set configuration 0 (value1): Set from source selector 1 is controlled via the Capture/Compare Unit timer, CCSTy signal 1 (value2): Set from source selector 1 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C1SS field. |
| C1M | Source selector 1 clear configuration 0 (value1): Clear from source selector 1 is controlled via the Capture/Compare Unit timer, CCSTy signal 1 (value2): Clear from source selector 1 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C1CS field. |
| S1ES | Source selector 1 set edge configuration 0 (value1): Generation of the set signal is disabled 1 (value2): Set signal is generated on a LOW to HIGH transition of the selected input 2 (value3): Set signal is generated on a HIGH to LOW transition of the selected input 3 (value4): Set signal is generated on both transitions of the selected input |
| C1ES | Source selector 1 clear edge configuration 0 (value1): Generation of the clear signal is disabled 1 (value2): Clear signal is generated on a LOW to HIGH transition of the selected input 2 (value3): Clear signal is generated on a HIGH to LOW transition of the selected input 3 (value4): Clear signal is generated on both transitions of the selected input |