Infineon /XMC4200 /SCU_CLK /CGATSET0

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CGATSET0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (value1)VADC 0 (value1)CCU40 0 (value1)CCU41 0 (value1)CCU80 0 (value1)POSIF0 0 (value1)USIC0 0 (value1)ERU1 0 (value1)HRPWM0

USIC0=value1, CCU80=value1, CCU41=value1, HRPWM0=value1, POSIF0=value1, VADC=value1, CCU40=value1, ERU1=value1

Description

Peripheral 0 Clock Gating Set

Fields

VADC

VADC Gating Set

0 (value1): No effect

1 (value2): Enable gating

CCU40

CCU40 Gating Set

0 (value1): No effect

1 (value2): Enable gating

CCU41

CCU41 Gating Set

0 (value1): No effect

1 (value2): Enable gating

CCU80

CCU80 Gating Set

0 (value1): No effect

1 (value2): Enable gating

POSIF0

POSIF0 Gating Set

0 (value1): No effect

1 (value2): Enable gating

USIC0

USIC0 Gating Set

0 (value1): No effect

1 (value2): Enable gating

ERU1

ERU1 Gating Set

0 (value1): No effect

1 (value2): Enable gating

HRPWM0

HRPWM0 Gating Set

0 (value1): No effect

1 (value2): Enable gating

Links

()