Infineon /XMC4200 /SCU_CLK /EXTCLKCR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as EXTCLKCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (value1)ECKSEL 0ECKDIV

ECKSEL=value1

Description

External Clock Control

Fields

ECKSEL

External Clock Selection Value

0 (value1): fSYS clock

2 (value3): fUSB clock

3 (value4): fPLL clock divided according to ECKDIV bit field configuration

4 (value5): fSTDBY clock

ECKDIV

External Clock Divider Value

Links

()