PBDIV=value1, CPUDIV=value1, WDTSEL=value1, CCUDIV=value1, SYSSEL=value1
Multi-Link Clock Control
| SYSDIV | System Clock Division Value |
| SYSSEL | System Clock Selection Value 0 (value1): fOFI clock 1 (value2): fPLL clock |
| CPUDIV | CPU Clock Divider Enable 0 (value1): fCPU = fSYS 1 (value2): fCPU = fSYS / 2 |
| PBDIV | PB Clock Divider Enable 0 (value1): fPERIPH = fCPU 1 (value2): fPERIPH = fCPU / 2 |
| CCUDIV | CCU Clock Divider Enable 0 (value1): fCCU = fSYS 1 (value2): fCCU = fSYS / 2 |
| WDTDIV | WDT Clock Divider Value |
| WDTSEL | WDT Clock Selection Value 0 (value1): fOFI clock 1 (value2): fSTDBY clock 2 (value3): fPLL clock |