Infineon /XMC4200 /SCU_CLK /SLEEPCR

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Interpret as SLEEPCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (value1)SYSSEL 0 (value1)USBCR 0 (value1)CCUCR 0 (value1)WDTCR

SYSSEL=value1, WDTCR=value1, CCUCR=value1, USBCR=value1

Description

Sleep Control Register

Fields

SYSSEL

System Clock Selection Value

0 (value1): fOFI clock

1 (value2): fPLL clock

USBCR

USB Clock Control

0 (value1): Disable

1 (value2): Enable

CCUCR

CCU Clock Control

0 (value1): Disable

1 (value2): Enable

WDTCR

WDT Clock Control

0 (value1): Disable

1 (value2): Enable

Links

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