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Infineon /XMC4200 /SCU_HIBERNATE /LPACST

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Interpret as LPACST

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (value1)VBATSCMP 0 (value1)AHIBIO0SCMP 0 (value1)VBATVAL 0 (value1)AHIBIO0VAL

AHIBIO0SCMP=value1, AHIBIO0VAL=value1, VBATVAL=value1, VBATSCMP=value1

Description

Hibernate Analog Control State Register

Fields

VBATSCMP

Trigger VBAT Single Compare Operation Status

0 (value1): Ready to start new compare operation

1 (value2): Compare operation completed
AHIBIO0SCMP

Trigger HIB_IO_0 Input Single Compare Operation Status

0 (value1): Ready to start new compare operation

1 (value2): Compare operation completed
VBATVAL

VBAT Compare Operation Result

0 (value1): Below programmed threshold

1 (value2): Above programmed threshold
AHIBIO0VAL

HIB_IO_0 Input Compare Operation Result

0 (value1): Below programmed threshold

1 (value2): Above programmed threshold

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data