Missed Frame and Buffer Overflow Counter Register
| MISFRMCNT | This field indicates the number of frames missed by the controller because of the RAM Receive Buffer being unavailable. This counter is incremented each time the DMA discards an incoming frame. The counter is cleared when this register is read. |
| MISCNTOVF | Overflow bit for Missed Frame Counter |
| OVFFRMCNT | This field indicates the number of frames missed by the application. The counter is cleared when this register is read. |
| OVFCNTOVF | Overflow bit for FIFO Overflow Counter |